如何仅使用4个NAND门构造XOR门?


17

xor门,现在我只需要使用4个nand门来构造此门

a b out
0 0 0
0 1 1
1 0 1
1 1 0

xor = (a and not b) or (not a and b),这是

A¯B+AB¯

我知道答案,但是如何从公式中获得门图?

异或门

编辑

我的直觉是,对我来说,如果我逐步进行定义,然后再进行定义,则应该理解这一点xor = (a and not b) or (not a and b)

A¯B¯AB¯¯¯

并且xor将与5个构成nand栅极(第一#1下图)

异或门2

我的问题更像是:想象历史上第一个人想出这个公式,他或她(思考过程)如何nand逐步地从这个公式中得到4个答案。

A¯+一种B¯

我确定您知道如何进行XOR(或任何其他函数)并将其转换为仅使用NAND的等效电路(由于NAND已完成,因此这始终是可能的)。但是如果你问怎么这个公式减少到只用4个NAND,或在一般情况下,不到非门,以及它是否是可能获得的等效电路与ķ与非门-我不知道有一个简单的为此。ķķ
Ran G.

以下是该问题的两个答案。我的想法很坦率,您可以设计(后验)一种方法,通过预先知道最终结果来找到所需的结构,这是问题中给出的,并且可以在Internet上找到。显然,这是一种更简单的做事方式,看起来很荒谬,没有给出一个通用的程序,而这是没有答案的。因此,我很想知道为什么选民在投票时会选择一个答案而不是另一个答案……如果您愿意抽时间发表简短评论。提前致谢。
babou 2015年

这个问题尚待解决,不清楚。我想可能是相当清楚什么OP是问,多i8nteresting,如果OP不屑于向谁试图回答他的各种用户的反应,
babou

electronics.stackexchange.com/questions/84714/…-这个问题较为笼统,答案为解决此问题的一般方法提供了更多信息,此答案electronics.stackexchange.com/a/84803显示了如何导出NAND XOR运算符的表示形式
Anton Trunov

我遇到了一些类似的问题,只是编写了一个程序来对所有内容进行系统地尝试...最多可以输入四个输入,其中只有65,536个可能的函数。对于稍微复杂一些的电路,这还使我能够优化延迟,并在一个或两个输入比其他输入晚的情况下找到最佳电路。具有5个输入= 2 ^ 32种可能功能的电路可能会使用蛮力来完成。
gnasher729

Answers:


13

从那个公式?可以办到。但是从这开始比较容易:(在这里使用不同的表示法)

a ^ b = ~(a & b) & (a | b)

好吧,现在呢?最终,我们应该派生它~(~(~(a & b) & a) & ~(~(a & b) & b))(看起来它有5个NAND,但就像电路图一样,它有一个被两次使用的子表达式)。

因此,制作看起来像~(a & b) & a(和相同的东西,但b结尾是a)的东西,并希望它能坚持下去:(and分布在or

(~(a & b) & a) | (~(a & b) & b)

现在已经很接近了,只需应用DeMorgan即可将中间部分or变为and

~(~(~(a & b) & a) & ~(~(a & b) & b))

就是这样。


9

我认为您正在要求此证明:

A^B = (!A)B + A(!B)
    = !!((!A)B) + !!(A(!B))
    = !(!!A + !B) + !(!A + !!B)
    = !(A + !B) + !(!A + B)
    = !((A + !B)(!A + B))
    = !(A(!A) + AB + (!A)(!B) + B(!B))
    = !(AB + (!A)(!B))
    = !(AB)(!(!A)(!B))
    = !(AB)(!!A + !!B)
    = !(AB)(A+B)
    = !(AB)A + !(AB)B
    = !!(!(AB)A + !(AB)B)
    = !((!(!(AB)A))(!(!(AB)B)))

尽管显然NAND在合成方程中使用了5 s,但是在!(AB)设计其电路时,该副本仅使用一次。


抱歉,A ^ B不是A AND B吗?您似乎打算证明XOR哪个符号应为should或⊻。但是这个证明是我真正想要的,谢谢!
osiixy

5

由于您已经有了图表答案,可以通过在Google中键入问题标题从Wikipedia轻松唤醒 ,作为 与您相同的.png图表,您应该很容易通过从该图中提取公式来查找公式。给出的定义如NAND NAND(A,B)=AB¯

  • 最左边的栅极给出 ;C=AB¯

  • 顶栅给出 ;D1=AC¯

  • 顶栅给出,因为NAND是commutatve像AND;D2=BC¯

  • 最右边的栅极给出E=D1D2¯

综上所述,我们首先注意到

C=AB¯=A¯+B¯

D1¯=AC=A(A¯+B¯)=AA¯+AB¯=0+AB¯=AB¯

类似地:D2¯=BA¯

因此
E=D1D2¯=D1¯+D2¯=AB¯+BA¯

这正是XOR的定义。如果您想从初始数据开始,则可以全部撤消,而不仅仅是检查答案。

在没有先验知识的情况下找到答案

这旨在回答作为对问题的编辑而添加的显式请求,以便从头开始查找解决方案。考虑到问题与思考过程有关,我将提供所有细节。

AB

XOR(A,B)=AB¯+BA¯

因此,我们可以尝试猜测此门的哪种输入将产生所需的输出。

NAND(X,Y)=XY¯=X¯+Y¯

将最后一个公式与我们必须得到的结果统一起来,我们得到:

  • X¯=AB¯X=AB¯¯=A¯+B

  • Y=A¯B¯=A+B¯

请注意,这只是最简单的可能性。由于NAND具有方程式属性,因此我们没有统一自由代数,因此还有其他输入对将给出期望的结果。但我们首先尝试一下。

XYAB

我们可以尝试重复统一过程(我曾经做过),但这自然会导致我们再使用四个门,从而得出5个门的解决方案。

XYZAB

XYZABAB

A 作为输入,产生作为输出:

Z=NAND(A,B)=AB¯=A¯+B¯

Now, we have to check whether combining Z with itself, A, B, 0, or 1 through a NAND gate can produce X, and also Y.

We know that combining a value with itself, 0 or 1 through a NAND gate is either the identity function or the negation. So the only remaining candidates are A and B.

It is easy to check that

NAND(Z,A)=ZA¯=AB¯A¯=(A¯+B¯)A¯=A¯A+B¯A¯=0+B¯A¯=B¯A¯=AB¯¯=X

Similarly NAND(Z,B)=Y

Hence we can compose these four gates to get the desired result, i.e., the XOR function.


Not in a reverse way to prove that they are equal. But image that you don't know the diagram but to construct the gate using minimum nand gate.
Timeless

1
What do you expect as an answer? A systematic technique for doing that. I do not know that there is any that is tractable enough to be worth using in complex cases. Given that I know the answer I can just lie to you and pretend to have found by reasonning what I discovered by checking the answer. This said, looking at what I get with NAND(A,B) is all that seems useful for a start. Then NANDing the result with one argument A or B, is also one thing to look at, to get a view of where I am. From there, one is pretty close to the final answer.
babou

1
@Timeless Another way to go about it is backward from the answer, knowing that the answer is fron a NAND gate. If you assume that the solution is symmetrical in A and B, it gives you a likely form of the inputs to the last NAND gate. There are many way to go about it, either to find the answer, or to justify finding it a posteriory. But a proof is a proof, whether found by your ingenuity, or given by some oracle or a good friend. And at some point no one can tell the difference. Actually, the backward proof I give could be the best proof, even if the solution was found some other way.
babou

Actually, it is quite common in math to have an analysis part to find a solution, then a synthesis part where you prove it is the solution. One usually gives both, but only the second part is really necessary.
babou

@Timeless Both answers were based on the knowledge of a formula to obtain, deduced from the diagram to be obtained. Your edit asked for a plausible intuitive scenario to find the answer without any prior knowledge of the result. I did add that to my answer, but it would be nice to know whether it fits what you expected.
babou 2015年

0

I take the input (0,0) as an example.

For XOR, the desired output is 0. However, NAND(0,0)=1.

  • Because the only way to get a 0 using NAND is (at the last layer) NAND(1,1)=0, you should first produce two 1's.

    • According to NAND(0,1)=1 or NAND(1,0)=1, you produce a 1 using one NAND(0,0) at the first layer and feed it, along with one input 0, into a second layer NAND.

Only four NANDs are involved. But it is only correct for the input (0,0) so far. So you need to check other inputs (0,1),(1,0), and (1,1) against the solution and find that it just works. Lucky.


0

I tried my best to give the answer using formula as asked.Hope you appreciate it.
Z=AB'+A'B
Z=AA'+AB'+BB'+A'B --->BB'=AA'=0
Z=A(A'+B')+B(B'+A')
Z=A(AB)'+B(AB)' --> Hint
so now (AB)' can get through 1st NAND gate,then in 2nd and third NAND gate the output of 1st NAND gate pass through with one of the input as A and B.After this we need one more complement so use fourth NAND gate.
NAND(1st)=(AB)'=A'+B'
NAND(2nd)=(A(AB)')'=(A(A'+B'))'=(AB')'=A'+B
NAND(3rd)=(B(AB)')'=(B(A'+B'))'=(A'B)'=A+B'
NAND(4th)=[(A'+B)(A+B')]' =[A'B'+AB]'=(A+B)(A'+B')=AB'+A'B

Happy!


0

The formula: XOR = (a and not b) or (not a and b).

Thats' not what you want, you want a formula that is a NAND. Remember that not (a or b) = not a and not b, and therefore (a or b) = not (not a and not b). Therefore

(a and not b) or (not a and b) =

not (not (a and not b) and not (not a and b)) =

not ((not a or b) and (a or not b)) =

NAND (not a or b, a or not b).

So we used one NAND gate, and have to calculate (not a or b) and (a or not b) using three NANDs. We turn each expression into a NAND:

not a or b = not (a and not b) = NAND (a, not b)

a or not b = not (not a and b) = NAND (not a, b)

Now we observe that (x and y) = x and (not x or y): If x is false then both sides are false. If x is true then (not x or y) = (false or y) = y. This is true for NAND just as it's true for AND. Therefore

NAND (a, not b) = NAND (a, not a or not b) = NAND (a, NAND (a, b))

NAND (b, not a) = NAND (b, not b or not a) = NAND (b, NAND (a, b)).

So we first find mid = NAND (a, b), left = NAND (a, mid) and right = NAND (b, mid), finally XOR = NAND (left, right).


-2

*From left to right--D1,D2,D3,D4 ** D1=(A.B)' OR(A'+B')

suppose

(A.B)'=C

D2=(A.C)'=A'+C'

D3=(B.C)'=B'+C' then

D4=(D2.D3)'

D4=((A.C)'.(B.C)')'

D4=(A.C)''+(B.C)''

D4=(A.C)+(B.C)

D4=A.(A'+B')+B.(A'+B')

D4=AB'+BA' {A.A'=B.B'=0}**


2
I find it hard to follow this answer or understand what process you are using. Can you add some text sentences to explain the approach, so this isn't just a sequence of equations?
D.W.
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