Answers:
使用lscpu命令:
$ lscpu
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
CPU(s): 2
On-line CPU(s) list: 0,1
Thread(s) per core: 1
Core(s) per socket: 2
Socket(s): 1
NUMA node(s): 1
Vendor ID: GenuineIntel
CPU family: 15
Model: 6
Stepping: 5
CPU MHz: 2400.000
BogoMIPS: 6000.33
L1d cache: 16K
L2 cache: 2048K
NUMA node0 CPU(s): 0,1
列出的信息是每个CPU内核的。
有一个免费命令(-h以可读格式显示结果,即GiB而不是字节):
$ free -h
total used free shared buffers cached
Mem: 2.0G 390M 1.6G 10M 15M 160M
-/+ buffers/cache: 215M 1.7G
Swap: 2.0G 0B 2.0G
系统文件
for d in /sys/devices/system/cpu/cpu0/cache/index*;
do tail -c+1 $d/{level,type,size}
echo
done
给出:
==> /sys/devices/system/cpu/cpu0/cache/index0/level <==
1
==> /sys/devices/system/cpu/cpu0/cache/index0/type <==
Data
==> /sys/devices/system/cpu/cpu0/cache/index0/size <==
32K
==> /sys/devices/system/cpu/cpu0/cache/index1/level <==
1
==> /sys/devices/system/cpu/cpu0/cache/index1/type <==
Instruction
==> /sys/devices/system/cpu/cpu0/cache/index1/size <==
32K
==> /sys/devices/system/cpu/cpu0/cache/index2/level <==
2
==> /sys/devices/system/cpu/cpu0/cache/index2/type <==
Unified
==> /sys/devices/system/cpu/cpu0/cache/index2/size <==
256K
==> /sys/devices/system/cpu/cpu0/cache/index3/level <==
3
==> /sys/devices/system/cpu/cpu0/cache/index3/type <==
Unified
==> /sys/devices/system/cpu/cpu0/cache/index3/size <==
8192K
getconf
getconf -a | grep CACHE
给出:
LEVEL1_ICACHE_SIZE 32768
LEVEL1_ICACHE_ASSOC 8
LEVEL1_ICACHE_LINESIZE 64
LEVEL1_DCACHE_SIZE 32768
LEVEL1_DCACHE_ASSOC 8
LEVEL1_DCACHE_LINESIZE 64
LEVEL2_CACHE_SIZE 262144
LEVEL2_CACHE_ASSOC 8
LEVEL2_CACHE_LINESIZE 64
LEVEL3_CACHE_SIZE 20971520
LEVEL3_CACHE_ASSOC 20
LEVEL3_CACHE_LINESIZE 64
LEVEL4_CACHE_SIZE 0
LEVEL4_CACHE_ASSOC 0
LEVEL4_CACHE_LINESIZE 0
或对于单个级别:
getconf LEVEL2_CACHE_SIZE
这个接口的优点是它只是POSIX sysconf
C函数的包装器(缓存参数是非POSIX扩展名),因此也可以在C代码中使用它。
在Ubuntu 16.04中测试。
x86 CPUID指令
CPUID x86指令还提供了缓存信息,并且可以由用户级直接访问:https : //en.wikipedia.org/wiki/CPUID
glibc似乎在x86上使用了该方法。我还没有通过逐步调试/指令跟踪来确认,但是2.28的源代码sysdeps/x86/cacheinfo.c
做到了:
__cpuid (2, eax, ebx, ecx, edx);
TODO现在创建一个最小的C示例,现在开始懒惰,请访问:https://stackoverflow.com/questions/14283171/how-to-receive-l1-l2-l3-cache-size-using-cpuid-instruction-in-x86
ARM还具有一种体系结构定义的机制,可通过诸如缓存大小ID寄存器(CCSIDR)之类的寄存器查找缓存大小,有关概述,请参见《ARMv8程序员手册》 11.6“缓存发现”。