这是后缀的社区Wiki的开始。我同意@David Kessner。Xilinx也在命令行工具文档中提供了此列表和这里公布的名单，并在这里（为earliers版本他们的软件）。
File Suffix,Input or output,description
asy,output,symbol file
awc,,
bat,input,batch file. Some are generated by PlanAhead
bgn,,bitgen report file
bin,,
bit,output,FPGA bitstream
blc,output,NGCBuild report file
bld,output,build report from NGDBuild
bmm,,blockram files
bsb,,
cdc,input,ChipScope file
cel,,
cfi,input and output,provides info to Support for Platform Flash PROM Design Revisioning
cgc,,ChipScope file
cgp,,Coregen project file
cmd,,
cmd_log,output,log file
cpj,,
css,output,HTML file
csv,output,pin list
ctj,,trigger file for ChipScope
dat,,
data,,
dbg
do,input,simulation script
drc,output,design rule check
edf,output,EDIF netlist
edif,,see edf
edn,,an EDIF file suffix
f,,used for functional simulation
filter,,used in ISE to filter messages
gise,output,"contain generated data, such as process status" per http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/ise_c_understanding_ise_project.htm
hdx,,used in PlanAhead for partitions
html,,report file
ipf,input,impact (programmer) project
isc,output,Configuration data in IEEE 1532 format.
jobs,,
js,output,JavaScript for some HTML report
lfp,,
ll,output, Readback information; created by bitgen
log,output,log file
lso,input,library search order input to XST.
lst,,
make,outout,from EDK tools
map,output,report file
mcs,output,prom file
mhs,,(EDK) Defines system
mrp,output,report file from map
mhs,,(EDK)
mif,input,memory initalization
mpd,,MicroProcessor Definition (EDK)
msd,output,Mask information from bitgen; used for verification
msk,output,mask information from bitgen; related to .bit
ncd,output,Native Circuit Description; after map process; used as bitgen input
ncf,,constraints for a core
new,,
ngc,output,used by NGDbuild
ngc_xst,output,
ngd,output,
ngo,output,intermediate netlist from NGDBuild
ngr,output,RTL schematic generated from XST
nky,,encryption key file, used by bitgen
nlf,output,ASCII NetGen NetGen log file that contains information on the NetGen run
nmc,,physical macros; used by NGDBuild
opt,,EDK generation options
pad,output,list of I/O pads/pins
par,output,Place and route log
pcf,,physical constraints file; used by bitgen
pdf,output,Acrobat document for core
ppr,,PlanAhead project file
prj,input,project file
prm,,PROM file generation control file
prn,output,exported ChipScope .csv file. Often lacks that suffix.
psg,output,PlanAhead strategy file
ptxw,,twx file which project navigator uses for parsing
pwr,,
pxml,,associated with partitions
rba,output,read back file created by bitgen; binary
rbb,output,read back file created by bitgen; ascii
rbd,output,read back file created by bitgen; data only
rbt,output,bit file in different format
restore,,
rtf,output,Documentation
runs,,directory in PlanAhead
rst,,
scr,,XST synthesis script
sdbl,,
sdbx,,Installation files
sdc,input,timing file [thanks @trondd]
sedif
sh,input,Linux shell script. Some are generated by PlanAhead
srcs,,directory in PlanAhead
srp,output,Synthesis log file
stx,,
sym,output,Core symbol file
tsi,,
txt,output,log file
twr,output,timing report
twx,output,
ucf,input,constraints file
unroutes,output,report file
urf,input,User Rules File; used by NGDBuild
ut,,
v,input or output,Verilog file for code. Output of coregen
vdbl,,
vbdx,,
veo,output,Verilog timing simulation file
vhd,input or output,input source VHDL file; output from Coregen
vho,output,VHDL timing simulation.
wcfg,input,ISim waveform configuration file
xaw,output,generated by Coregen
xbcd,,
xco,,use by Coregen to regenerate cores. Contains core's parameters
xdc,,
xdl,,
xise,,created by coregen
xlsx,,some report
xml,,some are output reports
xmp,,(EDK)
xmsgs,output,log file
xpa,,
xpe,,
xpi,,
xreport,output,report file
xrpt,output,report file, others are inputs to PlanAhead
xsf,,symbol file for Mentor
xst,output,associated with HTML file?
xsl,,
xst,,
unroutes,output,report file
wbd,output,Waveform Database
wxbt,,
y,,